PhD Oral Defense in Faculty of Science and Technology, by Mr. Xiaofeng YANG, on 17 September 2019

Ref. No :	ALEI-BFWFSJ	Posted by :	AnnaLei/UMAC
Department :	FST	Posted Date :	12/09/2019
Category :
	Bulletin 公告

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Dear Colleagues and Students,

I am pleased to announce that, Mr. Xiaofeng YANG, a PhD candidate in Department of Electrical and Computer Engineering in Faculty of Science and Technology, is going to have his oral defense on 17 Sep 2019 (Tue). You are welcome to attend the oral defense.

Date:	17 Sep 2019 (Tue)
Time:	16:00
Venue:	Administration Building (N6), Room G010 Ho Yin Conference Hall (N6-G010)
Thesis Title:	Inductor-less Low Jitter Clock Circuit Techniques and Design Considerations

Examination Committee

Chair:	Prof. Carlos Jorge Ferreira SILVESTRE, FST, UM
Supervisor:	Prof. Yan ZHU, Assistant Professor, Institute of Microelectronics, IME, UM
Co-Supervisor:	Prof. Chi Hang CHAN, Assistant Professor, Institute of Microelectronics, IME, UM
Members:	Prof. Yan LU, Assistant Professor, Institute of Microelectronics, IME, UM
	Prof. Jun YIN, Assistant Professor, Institute of Microelectronics, IME, UM
	Prof. Nanjian WU, Professor, State Key Laboratory for Superlattices and Microstructures, Chinese Academy of Sciences, China

Kindly note that video and/or audio recording is PROHIBITED while the oral defense is in progress.

Thank you for your kind attention.

Faculty of Science and Technology

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